台积电在2024年的国际固态电路会议（ISSCC）上宣布了一项重大技术突破，该公司展示了用于高性能计算与人工智能（AI）芯片的全新一代封装技术。这项技术是在现有的3D封装技术基础上发展而来的，它集成了硅光子技术，以提高芯片之间的互联效率，同时降低功耗。
台积电的业务开发资深副总裁张晓强表示，这项新技术旨在支持更高级的封装方案，从而能够容纳更多的HBM（高带宽内存）和Chiplet（小芯片）。这将显著提升AI芯片的处理能力，使其更加适合于数据中心、超级计算机以及其他高性能计算应用。
台积电的新封装技术不仅提升了芯片的性能，还通过优化芯片布局和互联方式，减少了数据传输延迟和能耗，这对于推动人工智能和机器学习的发展具有重要意义。随着数据量和计算需求的不断增加，这项技术将有助于满足市场对于更高性能和更节能计算设备的需求。
英文标题：TSMC Unveils Next-Generation Packaging Technology for High-Performance Computing and AI Chips
英文关键词：TSMC, high-performance computing, AI chips, packaging technology
英文新闻内容：
TSMC has announced a significant technological breakthrough at the International Solid-State Circuits Conference (ISSCC) 2024, introducing a new generation of packaging technology for high-performance computing and AI chips. This technology builds upon existing 3D packaging and integrates silicon photonics to enhance interconnect efficiency and reduce power consumption.
According to Vice President of Business Development, Xiaohua Zhang, the new technology is designed to support advanced packaging solutions that can accommodate more HBM and Chiplet. This will significantly enhance the processing capabilities of AI chips, making them more suitable for applications such as data centers, supercomputers, and other high-performance computing applications.
TSMC’s new packaging technology not only improves chip performance but also reduces data transmission latency and energy consumption through optimized chip layout and interconnects. This is crucial for advancing the development of artificial intelligence and machine learning, and will help meet the market’s growing need for higher-performance and more energy-efficient computing devices.
【来源】https://www.cls.cn/detail/1601181
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